1. Field of the Invention
The present invention relates to a filtering method and an A/D conversion apparatus having a filtering function, for generating digital data from an analog input signal after removing unnecessary high frequency signal components therefrom.
2. Description of the Related Art
Conventionally, in a control unit consisting of a microcomputer or the like, there has been used an A/D conversion apparatus constructed of an analog CR filter 3, an A/D converter 4, and a digital moving average filter 6 as shown in FIG. 12a, for example, in order to fetch detection signals (analog input signals Vin) from various sensors that detect an operational status of an object to be controlled.
The digital moving average filter 6 is a unit that removes unnecessary noise components (high-frequency signal components) from digital data Dad that occur as a result of A/D conversion by the A/D converter 4. For example, as shown in FIG. 12c, the digital moving average filter 6 is structured such that latch circuits LT at a plurality of stages operate in synchronism with a clock CKSD at a constant period to sequentially latch the digital data Dad from the A/D converter 4. Adder circuits ADD add outputs from these latch circuits LT, thereby to carry out moving average processing of the digital data Dad.
In other words, in the digital moving average filter 6, the latch circuits LT sequentially sample the digital data Dad at a plurality of stages in synchronism with the clock CKSD. The adder circuits ADD add the digital data Dad that have been sampled a plurality of times in the past, and average the digital data Dad. The averaged result is output as digital data DT that expresses a true A/D conversion result.
The digital moving average filter 6 may be realized by arithmetic processing (what is called a smoothing processing) of a microcomputer that constitutes the control unit, instead of the digital circuit as shown in FIG. 12c. 
On the other hand, when the A/D converter 4 carries out A/D conversion of the analog input signal Vin, an aliasing phenomenon of high-frequency signal components occurs, when the frequency of the analog input signal Vin becomes equal to or above one half of a sampling frequency fad of the A/D converter 4. Therefore, the analog CR filter 3 is provided as what is called a pre-filter at a pre-stage of the A/D converter 4, in order to remove the frequency components of not less than one half of the sampling frequency fad of the A/D converter 4 from the analog input signal Vin.
The analog CR filter 3 is structured as shown in FIG. 12b. The analog CR filter 3 has a non-inversion input terminal (+) of an operation amplifier OP1 grounded to the earth, has a capacitor C1 and a resistor RI connected in parallel between an inversion input terminal (xe2x88x92) of the operation amplifier OP1 and an output terminal, and has an input signal (analog) input to the inversion input terminal (xe2x88x92) of the operation amplifier OP1 via a resistor R2.
In other words, the analog CR filter 3 integrates the analog input signal Vin based on the resistances of resistors R1 and R2, the capacity of a capacitor C1, and the determined time constant. Based on this integration, the analog CR filter 3 limits the frequency of the analog input signal Vin input to the A/D converter 4 to less than one half of the sampling frequency fad of the A/D converter 4 according to a known xe2x80x9csampling theoremxe2x80x9d.
According to the A/D conversion apparatus that has the conventional filtering function having the above structure, the attenuation of a signal based on the digital moving average filter 6 becomes extremely small (approximately zero) at each of the frequencies of n times (where n is a positive integer including 1) the sampling frequency fsd (the frequency of the clock CKSD) (hereinafter referred to as xe2x80x9cfrequency rangexe2x80x9d). Unnecessary signal components pass through in this frequency range. Therefore, it is necessary to set the frequency versus attenuation characteristics of the analog CR filter 3 to be used as the pre-filter, such that the attenuation changes as steeply as possible in the frequency range in which the frequency exceeds the cutoff frequency. For this purpose, it has been necessary to increase the order of the analog CR filter 3, and lower the cutoff frequency.
FIG. 13a shows the frequency versus attenuation characteristics of the digital moving average filter 6 that carries out the moving average processing twice to average the digital data for the past sixteen times, with the sampling frequency fsd set to 100 kHz. As is clear from this diagram, according to the digital moving average filter 6 that uses the sampling frequency fsd as 100 kHz, the attenuation becomes approximately zero in the frequency range in which the frequency is n times the sampling frequency fsd like 100 kHz, 200 kHz, 300 kHz, etc. Therefore, it is not possible to remove unnecessary signal components in this frequency area.
For the above reason, when a low-order filter (specifically, a CR linear filter) is used for the analog CR filter 3, for example, it is not possible to make the signal attenuation sufficiently large in a high-frequency signal passing range (a frequency range of nxc3x97fsd) that is generated by the digital moving average filter 6 as shown by a one-point chain line in FIG. 13b. As a result, unnecessary high-frequency signal components pass through this frequency range.
Therefore, in order to prevent the above problem, it is necessary to increase the order of the analog CR filter 3 to as high a level as possible, and the analog CR filter 3 attenuates the high-frequency signal components that cannot be attenuated by the digital moving average filter 6. For this purpose, it is necessary to connect filters, as shown in FIG. 12b, at many stages. This leads to an increase in the size of the analog CR filter 3 and the size of the A/D conversion apparatus. Further, there occurs a problem of an increase in the cost of the A/D conversion apparatus.
Further, in order to make the analog CR filter 3 attenuate the high-frequency signal components that cannot be attenuated by the digital moving average filter 6, there is a method of lowering the cutoff frequency of the analog CR filter 3. However, in order to lower the cutoff frequency, it is necessary to increase the capacity of the capacitor C and the resistance of the resistor R that constitute the analog CR filter 3. This measure also has a problem of increasing the sizes of the analog CR filter 3 and the A/D conversion apparatus. Further there occurs a problem of an increase in the cost of the A/D conversion apparatus.
In the frequency versus attenuation characteristics of the digital moving average filter shown in FIGS. 13a and 13b, the attenuation becomes a maximum (infinite) at predetermined frequency intervals at a lower frequency side than the sampling frequency fsd (100 kHz) of the digital moving average filter 6. This is because the digital moving average filter 6 executes the moving average processing, and the number of peaks of the attenuation corresponds to the number of digital data to be averaged. Specifically, when the number of digital data to be averaged by the digital moving average filter 6 is xe2x80x9c2xe2x80x9d (that is, the averaging of the data for the past two times), the number of the peaks of the attenuation becomes xe2x80x9c1xe2x80x9d. When the number of digital data to be averaged is xe2x80x9c4xe2x80x9d (that is, the averaging of the data for the past four times), the number of the peaks of the attenuation becomes xe2x80x9c3xe2x80x9d.
In FIGS. 13a and 13b, the abscissa shows frequency as a logarithm, and the ordinate linearly displays attenuation. Therefore, it is difficult to know from these diagrams the number of peaks of attenuation generated in the frequency area of the sampling frequency 100 kHz and below. Actually, the number of digital data to be averaged by the digital moving average filter 6 is xe2x80x9c16xe2x80x9d. Therefore, the peak number of attenuation is xe2x80x9c15xe2x80x9d. This peak appears at frequency intervals (6.25 kHz) of the sampling frequency fsd (100 kHz) divided into sixteen (refer to FIG. 3 to be explained later in an embodiment). Consequently, the cutoff frequency of the digital moving average filter becomes lower as the number of the digital data to be averaged (the sampling number of the digital data) becomes larger.
The present invention has been made in the light of the above problems. It is an object of the present invention to provide a filtering method capable of attenuating unnecessary high-frequency signal components that cannot be attenuated by a digital moving average filter, without using an analog CR filter as a pre-filter, and an A/D conversion apparatus having a filtering function.
In order to achieve the above object, according to a first aspect of the present invention, there is provided a filtering method. In this filtering method, first, an analog moving average filter that averages input signals at every constant period in synchronism with a clock of a sampling frequency fsa is used to carry out a moving average processing of analog input signals. Then, an A/D converter A/D is used to convert the moving-averaged analog input signal. Further, a digital moving average filter, that operates at a sampling frequency fsd that is n times (where n is a positive integer including 1) the sampling frequency fsa, is used to moving average digital data that has been obtained by the A/D conversion.
In other words, according to the above aspect of the invention, in the filtering method, an analog moving average filter is used instead of the conventional analog CR filter as a pre-filter.
This is because the analog moving average filter averages the input signals at every constant period in synchronism with the clock of the sampling frequency fsa. Therefore, the attenuation becomes maximum (theoretically infinite) in the frequency area in which the frequency is n times the sampling frequency fsa (for example, 100 kHz, 200 kHz, 300 kHz, etc. when the sampling frequency fsa is 100 kHz) (refer to FIG. 2a to be explained later in the embodiment).
In other words, the inventors of the present application have noticed that in the analog moving average filter, the attenuation becomes infinite in the frequency range in which the frequency is n times the sampling frequency fsa, while the attenuation becomes minimum (approximately zero) in the frequency range in which the frequency is n times the sampling frequency fsd in the digital moving average filter. Therefore, the inventors have used the analog moving average filter as a pre-filter of the A/D converter, thereby to attenuate the high-frequency signal components corresponding to the unnecessary signal passing range that is generated in the digital moving average filter, based on the filter characteristics of the analog moving average filter.
In the analog moving average filter, because of its operation characteristic, the attenuation becomes infinite in the frequency range in which the frequency is n times the sampling frequency fsa, regardless of the structure of this filter. Therefore, unlike the conventional apparatus that uses the analog CR filter as a pre-filter, it is not necessary to take measures such as to increase the order of the filter or lower the cutoff frequency in order to attenuate the high-frequency signal components corresponding to the unnecessary signal passing range that is generated in the digital moving average filter. As a result, when the method of the present invention is used, it is possible to realize an A/D conversion apparatus that can obtain desired A/D conversion characteristics without receiving an influence of noise, in a more simple structure than the conventional structure.
In the method of the present invention, the sampling frequency fsd of the digital moving average filter is set to n times the sampling frequency fsa of the analog moving average filter. This is for the following reasons. When the sampling frequency fsd of the digital moving average filter is set in this way, the unnecessary signal passing range generated in the digital moving average filter becomes the frequency range in which the frequency xe2x80x9cfsaxc3x97nxe2x80x9d is further multiplied by n times. This frequency range is superimposed without fail on the frequency range in which the attenuation becomes infinite in the analog moving average filter.
As the analog moving average filter averages input signals at every one clock period (a sampling period) of the sampling frequency fsa, it is possible to define the operation characteristic as an integration result of a continuous function x(t) during a predetermined time t to (t+T) that is divided by the time T, as shown in the following expression (1). Therefore, it is possible to realize the analog moving average filter by using an analog circuit that satisfies the next expression (1). More specifically, it is possible to use a delay line filter that is disclosed in Kokai (Unexamined Patent Publication) No. 8-32408, for example.                                           u            ⁡                          (                              τ                ,                t                            )                                =                                                    1                τ                            ⁢                                                ∫                  t                                      t                    +                    τ                                                  ⁢                                  sin                  ⁢                                      xe2x80x83                                    ⁢                  2                  ⁢                  π                  ⁢                                      xe2x80x83                                    ⁢                  fv                  ⁢                                      ⅆ                    v                                                                        =                                          1                                  2                  ⁢                  π                  ⁢                                      xe2x80x83                                    ⁢                  f                  ⁢                                      xe2x80x83                                    ⁢                  τ                                            ⁢                                                2                  ⁢                                      (                                          1                      -                                              cos                        ⁢                                                  xe2x80x83                                                ⁢                        2                        ⁢                        π                        ⁢                                                  xe2x80x83                                                ⁢                        f                        ⁢                                                  xe2x80x83                                                ⁢                        τ                                                              )                                                              ⁢                              sin                ⁡                                  (                                                            2                      ⁢                      π                      ⁢                                              xe2x80x83                                            ⁢                      f                      ⁢                                              xe2x80x83                                            ⁢                      t                                        +                    φ                                    )                                                                    ⁢                  
                ⁢                  φ          =                                    tan                              -                1                                      ⁢                                          1                -                                  cos                  ⁢                                      xe2x80x83                                    ⁢                  2                  ⁢                  π                  ⁢                                      xe2x80x83                                    ⁢                  f                  ⁢                                      xe2x80x83                                    ⁢                  τ                                                            sin                ⁢                                  xe2x80x83                                ⁢                2                ⁢                π                ⁢                                  xe2x80x83                                ⁢                f                ⁢                                  xe2x80x83                                ⁢                τ                                                                        (        1        )            
A phase frequency characteristic xcfx86a of the analog moving average filter defined in the above equation (1) can be expressed as given in the following equation (2), when the sampling frequency is fsa and the frequency of the input signal is f. This phase frequency characteristic xcfx86a has a linear characteristic that is in a leading phase relative to an input signal and is proportional with the frequency f of the input signal.
xcfx86a=(1/2)xc3x97(1/fsa)xc3x972xcfx80fxe2x80x83xe2x80x83(2) 
On the other hand, a phase frequency characteristic xcfx86d of the digital moving average filter can be expressed as given in the following equation (3), when the sampling frequency is fsd and the number of data for moving average is N. This phase frequency characteristic xcfx86d has a linear characteristic that is in a delay phase relative to an input signal and is proportional with the frequency f of the input signal.
xcfx86d=xe2x88x92(Nxe2x88x921)/2xc3x97(1/fsd)xc3x972xcfx80fxe2x80x83xe2x80x83(3) 
Therefore, when the input signals are moving averaged before and after the A/D conversion by using the analog moving average filter and the digital moving average filter as in the method of the present invention, it is possible to offset phase changes that are generated in the filters and reduce the change in the phase of the obtained digital data from the phase of the analog input signal.
Particularly, as described later, when the sampling frequencies fsa and fsd are set as the same frequencies, and also when the number N of the data to be moving averaged by the digital moving average filter is 2, it is possible to make the phase frequency characteristics of the filters completely coincide with each other by removing phase deviation (a leading phase and a delay phase). As a result, it is possible to make the phase of the finally obtained digital data and the phase of the analog input signal completely coincide with each other.
As the analog moving average filter is used in place of the conventional analog CR filter, it is preferable that the frequency of the analog input signal that is input to the A/D converter is limited to one half or less (preferably one fifth or less) of the sampling frequency of the A/D converter.
In other words, while the cutoff frequency fc of the analog moving average filter changes depending on the sampling frequency fsa, and fc becomes equal to 0.44xc3x97fsa, it is preferable that the sampling frequency fad of the A/D converter is, taking some extra margin into account, set to at least five times the maximum frequency of the analog input signal that passes through the analog moving average filter.
According to a second aspect of the present invention, there is provided a filtering method. In this filtering method, a pulse delay circuit having delay units connected in cascade at a plurality of stages is used to A/D convert an analog input signal. Further, a digital moving average filter is used to moving average digital data that has been obtained by the A/D conversion.
Further, in A/D converting the analog input signal by using the pulse delay circuit, the analog input signal is input to the pulse delay circuit as a signal for controlling the delay time of each delay unit. At the same time, a pulse signal is input to the pulse delay circuit, and the pulse signal is transmitted by sequentially delaying the signal by a delay time of each delay unit. Then, the number of stages of delay units through which the pulse signal has passed within the pulse delay circuit is counted at every constant period in synchronism with a clock of a sampling frequency fstad. Based on this, digital data that expresses a signal level of the analog input signal is generated.
Further, the sampling frequency fsd of the digital moving average filter is set to n times (where n is a positive integer including 1) the sampling frequency fstad at the time of A/D converting the analog input signal by using the pulse delay circuit.
In other words, when the pulse delay circuit has been operated following the method of the present invention, the delay time of the pulse signal when this signal passes through each delay unit within the pulse delay circuit changes according to the signal level of the analog input signal. This delay time varies based on unnecessary high-frequency signal components when the unnecessary high-frequency signal components are superimposed on the analog input signal. However, when the pulse signal passes through each delay unit, the variation component according to the high-frequency signal component is offset. As a result, an average delay time after the pulse signal has passed through the plurality of delay units corresponds to the signal level of a true analog input signal after removing the high-frequency signal components.
Therefore, according to the method of the present invention, the pulse delay circuit is operated as explained above, and the number of stages of delay units through which the pulse signal has passed within the pulse delay circuit at every constant time determined by the period (the sampling period) of the sampling frequency fstad is counted. Based on this count, a moving average of the time taken by the pulse signal to pass through each delay unit is obtained. This moving average is output as digital data that expresses a true signal level of the analog input signal after removing the high-frequency signal components.
Therefore, when the pulse signal has been transmitted within the pulse delay circuit as in the method of the present invention, the pulse delay circuit functions as the analog moving average filter as described in the first aspect of the invention. The number of stages of delay units through which the pulse signal has passed within a constant time determined by the period (the sampling period) of the sampling frequency fstad corresponds to the digital data that has been obtained by A/D converting the moving-averaged analog input signals using the A/D converter described in the first aspect of the invention.
In other words, according to the method of the present invention, the analog moving average filter and the A/D converter described in the first aspect of the invention are realized by using the pulse delay circuit. The digital data obtained by the A/D conversion is moving averaged by the digital moving average filter.
Further, in the method of the present invention, by averaging the analog input signals with the pulse delay circuit, it is also possible to realize a filtering characteristic that the attenuation becomes infinite in the frequency area in which the frequency is n times the sampling frequency fstad that is used to average the analog input signals. Therefore, as in the method of the first aspect of the invention, the sampling frequency fsd of the digital moving average filter is set to n times the sampling frequency fstad at the time of averaging the analog input signals with the pulse delay circuit. With this arrangement, by averaging the analog input signals with the pulse delay circuit, it becomes possible to sufficiently attenuate the high-frequency signal components corresponding to the unnecessary signal passing area that is generated in the digital moving average filter. As a result, it is possible to achieve the object of the present invention.
Further, in the method of the present invention, as the pulse delay circuit averages the input signal at every one clock period (the sampling period) of the sampling frequency fstad, it is also possible to define the operation characteristic as shown in the above equation (1). Further, the phase frequency characteristic ftad of the analog moving average filter that is realized by using the pulse delay circuit also becomes similar to that when the analog moving average filter is structured as a single unit, as shown in the above equation (2).
Therefore, in the method of the present invention, it is also possible to reduce the change in the phase of the digital data finally obtained via the digital moving average filter, from the phase of the analog input signal, in a similar manner to that of the method of the first aspect of the present invention. Particularly, when the sampling frequencies fstad and fsd are set as the same frequencies, and also when the number N of the data to be moving averaged by the digital moving average filter is 2, it is possible to make the phase of the obtained digital data completely coincide with the phase of the analog input signal.
Further, according to the method of the present invention, by using the pulse delay circuit, it is possible to realize the function of the analog moving average filter and the function of the A/D converter described in the first aspect of the present invention. Therefore, it is possible to simplify the structure of the apparatus and it is possible to make the A/D conversion apparatus more compact than that of the first aspect of the invention.
Further, in the method of the present invention, as the function of the analog moving average filter and the function of the A/D converter are realized by using the pulse delay circuit, the sampling frequency of the analog moving average filter and the sampling frequency of the A/D converter coincide with each other. In the function of the analog moving average filter that is realized by using the pulse delay circuit, it is also possible to express the cutoff frequency fc of the filter as being equal to 0.44xc3x97ftad, by using the sampling frequency fstad. Therefore, it is considered that the high-frequency signal components that are at least one half of the sampling frequency fstad are A/D converted without being sufficiently attenuated and are aliased as low-frequency components (the aliasing phenomenon).
However, according to the method of the present invention, as the digital data obtained by A/D conversion is moving averaged by the digital moving average filter at a later stage, it is possible to attenuate the high-frequency signal components by this processing in a similar manner to that when the analog moving average filter is used.
Further, in the method of the present invention, the analog input signal is input to the pulse delay circuit as a signal for controlling the delay time of each delay unit. This is for the purpose of controlling the delay time of each delay unit according to the analog input signal. As a detailed input method, the delay units may be constructed of gate circuits, and the analog input signal may be input to the pulse delay circuit as a driving voltage of each gate circuit. Alternatively, the delay units may be constructed of gate circuits, and the analog input signal may be input to the pulse delay circuit as a signal for controlling a driving current that flows to each delay unit.
A gate circuit operates at a higher speed when a driving voltage or a driving current is larger. Therefore, when the delay units are constructed of gate circuits and also when the analog input signal is input to the pulse delay circuit as a driving voltage or a driving current control signal of the gate circuits, it becomes possible to easily change the delay time of the delay units that constitute the pulse delay circuit, according to the signal level of the analog input signal.
Next, according to a third aspect of the present invention, there is provided an A/D conversion apparatus having a filtering function. The A/D conversion apparatus comprises: an analog moving average filter that averages analog input signals at every constant period in synchronism with a clock of a sampling frequency fsa; an A/D converter that A/D converts analog input signals averaged based on the analog moving average processing into digital data; and a digital moving average filter that samples digital data obtained by A/D conversion of the analog input signals by the A/D converter, at a sampling frequency fsd that is n times the sampling frequency fsa, and calculates an average value of sampling data for the past plurality of times obtained by the sampling.
Therefore, according to the A/D conversion apparatus of the third aspect of the invention, it is possible to convert an analog input signal into digital data based on the filtering method of the first aspect of the invention. The analog moving average filter provided as a pre-filter can efficiently attenuate high-frequency signal components corresponding to an unnecessary signal passing area that is generated in the digital moving average filter. Therefore, according to this apparatus, it is not necessary to increase the order of the pre-filter (the analog CR filter) or lower the cutoff frequency in order to obtain a desired A/D conversion characteristic without receiving an influence of noise, unlike the conventional practice. Further, it is possible to realize this apparatus in a simple structure (and at low cost).
Further, according to a fourth aspect of the present invention, there is provided an A/D conversion apparatus having a filtering function. According to this A/D conversion apparatus, in the apparatus of the third aspect of the invention, the digital moving average filter is structured to operate at a sampling frequency fsd that is the same as the sampling frequency fsa of the analog moving average filter, and calculates an average value of sampling data for the past two times that have been obtained by the sampling.
Therefore, according to the apparatus of the fourth aspect of the invention, it is possible to mutually offset the phase change that is generated in the analog moving average filter and the phase change that is generated in the digital moving average filter. As a result, in the A/D conversion apparatus as a whole, it is possible to generate digital data that has no deviation in phase from the phase of the analog input signal.
Further, according to a fifth aspect of the present invention, there is provided an A/D conversion apparatus having a filtering function. This A/D conversion apparatus has a time A/D converter having a filtering function comprising: a pulse delay circuit that has delay units connected in cascade at a plurality of stages to delay an input pulse by a delay time corresponding to a signal level of an analog input signal and output the signal, and that transmits the pulse signal by sequentially delaying the signal by a delay time of each delay unit; and a counting unit that counts the number of stages of delay units through which the pulse signal has passed within the pulse delay circuit at every constant period in synchronism with a clock of a sampling frequency fstad. The A/D conversion apparatus outputs a count value obtained by the counting unit as digital data that expresses a signal level of the analog input signal.
Then, the digital data that is output from the time A/D converter is input to a digital moving average filter. The digital moving average filter samples the digital data at a sampling frequency fsd that is n times (where n is a positive integer including 1) the sampling frequency fstad, and calculates an average value of sampling data for the past plurality of times obtained by the sampling, by moving average processing.
In other words, the A/D conversion apparatus of the fifth aspect of the invention is an apparatus that converts the analog input signal into digital data based on the filtering method of the second aspect of the invention. The time A/D converter uses the pulse delay circuit to moving average the analog input signals and, at the same time, A/D converts the analog input signals.
Therefore, according to the A/D conversion apparatus of the fifth aspect of the invention, it is possible to obtain an effect similar to that of the apparatus of the third aspect of the invention. Further, as the time A/D converter functions as the analog moving average filter and the A/D converter of the third aspect of the invention, it is possible to simplify the structure of the apparatus as compared with the apparatus of the third aspect of the invention. As a result, it is possible to realize the A/D conversion apparatus having a filtering function at a lower cost than that of the apparatus of the third aspect having a similar function.
Further, according to a sixth aspect of the present invention, there is provided an A/D conversion apparatus having a filtering function. According to this A/D conversion apparatus, in the apparatus of the fifth aspect of the invention, the digital moving average filter is structured to operate at a sampling frequency fsd that is the same as the sampling frequency fstad of the time A/D converter, and calculates an average value of sampling data for the past two times that have been obtained by the sampling.
Therefore, according to the apparatus of the sixth aspect of the invention, it is possible to mutually offset the phase change that is generated in the time A/D converter and the phase change that is generated in the digital moving average filter, in a similar manner to that of the apparatus of the fourth aspect of the invention. As a result, in the A/D conversion apparatus as a whole, it is possible to generate digital data that has no deviation in the phase from the phase of the analog input signal.
According to the A/D conversion apparatus having a filtering function in the fifth and sixth aspects of the invention, the time A/D converter realizes the function of the analog moving average filter and the function of the A/D converter, by controlling a delay time of delay units that constitute the pulse delay circuit using an analog input signal, and by detecting the number of stages of delay units through which the pulse signal has passed within the pulse delay circuit at every constant time determined by the period (the sampling period) of the sampling frequency fstad. For a counting unit that counts the number of stages of the delay units through which the pulse signal has passed, the structure of the following seventh aspect of the invention may be used, for example.
According to the seventh aspect of the present invention, there is provided an A/D conversion apparatus having a filtering function. In this A/D conversion apparatus, a counting unit comprises an encoder that converts a reaching position of a pulse signal within a pulse delay circuit into digital data of a predetermined number of bits, and an operating unit that calculates a difference between the latest value and the last value of digital data obtained based on the conversion by the encoder in synchronism with the clock of the sampling frequency fstad. A time A/D converter outputs a result of the operation by the operating unit as digital data that expresses a signal level of an analog input signal.
Therefore, according to the A/D conversion apparatus of the seventh aspect of the invention, digital data that expresses the number of stages of delay units through which a pulse signal has passed within the pulse delay circuit is output repeatedly in synchronism with the clock of the sampling frequency fstad. Therefore, it is possible to continuously execute the moving average processing repeatedly at the digital moving average filter side.
On the other hand, based on the structure of the time A/D converter as described in the seventh aspect of the invention, when the number of sampled digital data to be moving averaged by the digital moving average filter at a later stage becomes larger, the time per one A/D conversion becomes longer. Therefore, it is necessary to increase the number of delay units through which a pulse signal is passed within the pulse delay circuit, corresponding to this time increase. However, the increase in the number of delay units leads to an increase in the number of transistors that constitute the pulse delay circuit. Consequently, the scale of the circuit becomes larger. Therefore, in order to prevent this problem, it is preferable to structure the time A/D converter as described in the following eighth aspect of the invention.
According to the eighth aspect of the present invention, there is provided an A/D conversion apparatus having a filtering function. In this A/D conversion apparatus, a pulse delay circuit provided in a time A/D converter is constructed of a ring delay line that circulates a pulse signal by having delay units connected in a ring shape. A counting unit comprises an encoder that converts a position at which a pulse signal locates within the ring delay line into digital data of a predetermined number of bits, and a counter that detects the number of times of circulation of the pulse signal in the ring delay line.
Further, the counting unit is provided with an operating unit that fetches digital data having an output from the encoder as low-order bit data and a count value of the counter as high-order bit data, in synchronism with the clock of a sampling frequency fstad, and calculates a difference between the latest value and the last value of the fetched digital data. A time A/D converter outputs a result of the operation by the operating unit as digital data that expresses a signal level of an analog input signal.
In other words, based on the above structure, a pulse signal circulates in the ring delay line as the pulse delay circuit. Digital data as a result of the A/D conversion is generated repeatedly in synchronism with the clock, based on the number of circulations (a count value of the counter) of the pulse signal within the ring delay line and the reaching position (the output of the encoder) of the pulse signal within the ring delay line. Therefore, it is possible to freely set the number of delay units that constitute the pulse delay circuit (the ring delay line) without taking into account time taken per one A/D conversion. As a result, according to the A/D conversion apparatus of the eighth aspect of the invention, it is possible to reduce the sizes of the time A/D converter that is used to carry out A/D conversion, and reduce the sizes of the apparatus as a whole.